Collaboration diagram for CMSIS CM3 Core Register:

Macros
#define	SCS_BASE (0xE000E000)

#define	ITM_BASE (0xE0000000)

#define	CoreDebug_BASE (0xE000EDF0)

#define	SysTick_BASE (SCS_BASE + 0x0010)

#define	NVIC_BASE (SCS_BASE + 0x0100)

#define	SCB_BASE (SCS_BASE + 0x0D00)

#define	InterruptType ((InterruptType_Type *) SCS_BASE)

#define	SCB ((SCB_Type *) SCB_BASE)

#define	SysTick ((SysTick_Type *) SysTick_BASE)

#define	NVIC ((NVIC_Type *) NVIC_BASE)

#define	ITM ((ITM_Type *) ITM_BASE)

#define	CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

#define	MPU_BASE (SCS_BASE + 0x0D90)

#define	MPU ((MPU_Type*) MPU_BASE)

Detailed Description

Macro Definition Documentation

#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Core Debug configuration struct

#define CoreDebug_BASE (0xE000EDF0)

Core Debug Base Address

#define InterruptType ((InterruptType_Type *) SCS_BASE)

Interrupt Type Register

#define ITM ((ITM_Type *) ITM_BASE)

ITM configuration struct

#define ITM_BASE (0xE0000000)

ITM Base Address

#define MPU ((MPU_Type*) MPU_BASE)

Memory Protection Unit

#define MPU_BASE (SCS_BASE + 0x0D90)

Memory Protection Unit

#define NVIC ((NVIC_Type *) NVIC_BASE)

NVIC configuration struct

#define NVIC_BASE (SCS_BASE + 0x0100)

NVIC Base Address

#define SCB ((SCB_Type *) SCB_BASE)

SCB configuration struct

#define SCB_BASE (SCS_BASE + 0x0D00)

System Control Block Base Address

#define SCS_BASE (0xE000E000)

System Control Space Base Address

#define SysTick ((SysTick_Type *) SysTick_BASE)

SysTick configuration struct

#define SysTick_BASE (SCS_BASE + 0x0010)

SysTick Base Address