MPU_Type Struct Reference

#include <core_cm3.h>

Data Fields
__I uint32_t	TYPE
__IO uint32_t	CTRL
__IO uint32_t	RNR
__IO uint32_t	RBAR
__IO uint32_t	RASR
__IO uint32_t	RBAR_A1
__IO uint32_t	RASR_A1
__IO uint32_t	RBAR_A2
__IO uint32_t	RASR_A2
__IO uint32_t	RBAR_A3
__IO uint32_t	RASR_A3

Field Documentation

__IO uint32_t MPU_Type::CTRL

Offset: 0x04 MPU Control Register

__IO uint32_t MPU_Type::RASR

Offset: 0x10 MPU Region Attribute and Size Register

__IO uint32_t MPU_Type::RASR_A1

Offset: 0x18 MPU Alias 1 Region Attribute and Size Register

__IO uint32_t MPU_Type::RASR_A2

Offset: 0x20 MPU Alias 2 Region Attribute and Size Register

__IO uint32_t MPU_Type::RASR_A3

Offset: 0x28 MPU Alias 3 Region Attribute and Size Register

__IO uint32_t MPU_Type::RBAR

Offset: 0x0C MPU Region Base Address Register

__IO uint32_t MPU_Type::RBAR_A1

Offset: 0x14 MPU Alias 1 Region Base Address Register

__IO uint32_t MPU_Type::RBAR_A2

Offset: 0x1C MPU Alias 2 Region Base Address Register

__IO uint32_t MPU_Type::RBAR_A3

Offset: 0x24 MPU Alias 3 Region Base Address Register

__IO uint32_t MPU_Type::RNR

Offset: 0x08 MPU Region RNRber Register

__I uint32_t MPU_Type::TYPE

Offset: 0x00 MPU Type Register

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The documentation for this struct was generated from the following file:

• /var/www/html/SJSU-DEV-Linux/firmware/default/lib/L0_LowLevel/core_cm3.h