lpc_isr.h
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18 
23 #ifndef _SYS_ISRS_H__
24 #define _SYS_ISRS_H__
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 #include "LPC17xx.h"
29 
30 
31 
46 void isr_register(IRQn_Type num, void (*isr_func_ptr) (void));
47 
65 typedef enum
66 {
72  IP_above_freertos = 1, /* Do not use FreeRTOS API with this priority! */
73  IP_SYSCALL = 2, /* Do not use FreeRTOS API for ISR priorities below this */
74  IP_KERNEL = 31, /* Must be the lowest priority in the system */
84  /* Name the default, high and low priorities */
85  IP_default = 20,
89  /* Suggested interrupt priorities for commonly used peripherals */
98  /* Rest of the interrupts probably don't need a fast response so set them
99  * to default priority. You don't want to overcomplicate a system by
100  * changing too many priorities unless absolutely needed.
101  */
122 
123 
124 
125 #ifdef __cplusplus
126 }
127 #endif
128 #endif
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intr_priorities_t
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CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series.
Definition: lpc_isr.h:107
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void isr_register(IRQn_Type num, void(*isr_func_ptr)(void))
Definition: startup.cpp:338
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enum IRQn IRQn_Type
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