39 static inline void ssp0_init(
unsigned int max_clock_mhz)
53 static inline void ssp0_set_max_clock(
unsigned int max_clock_mhz)
55 ssp_set_max_clock(
LPC_SSP0, max_clock_mhz);
64 static inline char ssp0_exchange_byte(
char out)
66 return ssp_exchange_byte(
LPC_SSP0, out);
72 static inline void ssp0_exchange_data(
void *data,
int len)
74 ssp_exchange_data(
LPC_SSP0, data, len);
void lpc_pclk(lpc_pclk_t peripheral, clkdiv_t divider)
Definition: lpc_peripherals.c:42
unsigned int unsigned int len
Definition: startup.cpp:197
Definition: lpc_peripherals.h:94
Definition: lpc_peripherals.h:109
This file provides the configurable parameters for your project.
CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series.
Definition: lpc_peripherals.h:58
#define LPC_SSP0
Definition: LPC17xx.h:1029
void lpc_pconp(lpc_pconp_t peripheral, bool on)
Definition: lpc_peripherals.c:30