bio.h
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1 /*
2  * SocialLedge.com - Copyright (C) 2013
3  *
4  * This file is part of free software framework for embedded processors.
5  * You can use it and/or distribute it as long as this copyright header
6  * remains unmodified. The code is free for personal use and requires
7  * permission to use in a commercial product.
8  *
9  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
10  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
12  * I SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
13  * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
14  *
15  * You can reach the author of this software at :
16  * p r e e t . w i k i @ g m a i l . c o m
17  */
18 
26 #ifndef BIO_H__
27 #define BIO_H__
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
32 #include "LPC17xx.h"
33 
34 
35 
37 #define BIO_FLASH_CS_P0PIN 6
38 #define BIO_NORDIC_CS_P0PIN 16
39 #define BIO_NORDIC_IRQ_P0PIN 22
40 #define BIO_NORDIC_CE_P1PIN 24
41 #define BIO_LIGHT_ADC_CH_NUM 2
42 #define BIO_SD_CARD_CS_P1PIN 25
43 #define BIO_SD_CARD_CD_P1PIN 26
44 
45 #define BIO_LED_PORT1_MASK ((1UL<<0) | (1<<1) | (1<<4) | (1<<8))
46 #define BIO_SW_PORT1_MASK ((1UL<<9) | (1<<10) | (1<<14) | (1<<15))
47 
52 static inline char board_io_flash_cs(void) { LPC_GPIO0->FIOCLR = (1 << BIO_FLASH_CS_P0PIN); return 1; }
53 static inline char board_io_flash_ds(void) { LPC_GPIO0->FIOSET = (1 << BIO_FLASH_CS_P0PIN); return 0; }
54 static inline char board_io_sd_cs(void) { LPC_GPIO1->FIOCLR = (1 << BIO_SD_CARD_CS_P1PIN); return 1; }
55 static inline char board_io_sd_ds(void) { LPC_GPIO1->FIOSET = (1 << BIO_SD_CARD_CS_P1PIN); return 0; }
56 
57 static inline char board_io_nordic_cs(void) { LPC_GPIO0->FIOCLR = (1 << BIO_NORDIC_CS_P0PIN); return 1; }
58 static inline char board_io_nordic_ds(void) { LPC_GPIO0->FIOSET = (1 << BIO_NORDIC_CS_P0PIN); return 0; }
59 static inline char board_io_nordic_irq_sig(void) { return !!(LPC_GPIO0->FIOPIN & (1 << BIO_NORDIC_IRQ_P0PIN)); }
60 static inline char board_io_sd_card_cd_sig(void) { return !!(LPC_GPIO1->FIOPIN & (1 << BIO_SD_CARD_CD_P1PIN)); }
61 static inline void board_io_nordic_ce_high(void) { LPC_GPIO1->FIOSET = (1 << BIO_NORDIC_CE_P1PIN); }
62 static inline void board_io_nordic_ce_low (void) { LPC_GPIO1->FIOCLR = (1 << BIO_NORDIC_CE_P1PIN); }
70 static inline void board_io_pins_initialize(void)
71 {
72  /* Important to deselect all spi devices before configuring their direction*/
73  board_io_flash_ds();
74  board_io_sd_ds();
75  board_io_nordic_ds();
76 
77  /* Initialize Uart0 pins on P0.2 and P0.3 */
78  LPC_PINCON->PINSEL0 &= ~(0xF << 4);
79  LPC_PINCON->PINSEL0 |= (0x5 << 4);
80 
81  /* Initialize Flash CS on P0.6*/
82  LPC_PINCON->PINSEL0 &= ~(0x3 << 12);
83  LPC_GPIO0->FIODIR |= (1 << BIO_FLASH_CS_P0PIN);
84 
85  /* Initialize SSP1 on P0.7, P0.8, and P0.9 */
86  LPC_PINCON->PINSEL0 &= ~(0x3F << 14);
87  LPC_PINCON->PINSEL0 |= (0x2A << 14);
88 
89  /* Initialize I2C2 pins on P0.10 and P0.11 */
90  LPC_PINCON->PINSEL0 &= ~(0x0F << 20);
91  LPC_PINCON->PINSEL0 |= (0x0A << 20);
92 
93  /* Initialize SSP0 on P0.15, P0.17, and P0.18 */
94  LPC_PINCON->PINSEL0 &= ~(0x3 << 30);
95  LPC_PINCON->PINSEL0 |= (0x2 << 30);
96  LPC_PINCON->PINSEL1 &= ~(0xF << 2);
97  LPC_PINCON->PINSEL1 |= (0xA << 2);
98 
99  /* Initialize Nordic signals: P0.16: CS, P0.22: IRQ, P1.24: CE */
100  LPC_PINCON->PINSEL1 &= ~(0x3 << 0);
101  LPC_GPIO0->FIODIR |= (1 << BIO_NORDIC_CS_P0PIN);
102  LPC_PINCON->PINSEL1 &= ~(0x3 << 12);
103  LPC_GPIO0->FIODIR &= ~(1 << BIO_NORDIC_IRQ_P0PIN);
104  LPC_PINCON->PINSEL3 &= ~(0x3 << 16);
105  LPC_GPIO1->FIODIR |= (1 << BIO_NORDIC_CE_P1PIN);
106 
107  /* Initialize light sensor ADC pin on P0.25 */
108  LPC_PINCON->PINSEL1 &= ~(0x3 << 18);
109  LPC_PINCON->PINSEL1 |= (0x1 << 18);
110 
111  /* Initialize LED0-3 on P1.0, P1.1, P1.4, P1.8 */
112  LPC_PINCON->PINSEL2 &= ~(0x3030F << 0);
113  LPC_GPIO1->FIODIR |= ( BIO_LED_PORT1_MASK );
114 
115  /* Initialize SW0-3 on P1.9, P1.10, P1.14, P1.15 */
116  LPC_PINCON->PINSEL2 &= ~(0xF << 18);
117  LPC_PINCON->PINSEL2 &= ~(0xF << 28);
118  LPC_GPIO1->FIODIR &= ~( BIO_SW_PORT1_MASK );
119 
120  /* Initialize IR pin to be used as capture pin (not GPIO) */
121  LPC_PINCON->PINSEL3 &= ~(0x3 << 4);
122  LPC_PINCON->PINSEL3 |= (0x3 << 4);
123 
124  /* Initialize SD card CS(P1.25) and CD (P1.26 - card detect) signals*/
125  LPC_PINCON->PINSEL3 &= ~(0xF << 18);
126  LPC_GPIO1->FIODIR |= (1 << BIO_SD_CARD_CS_P1PIN);
127  LPC_GPIO1->FIODIR &= ~(1 << BIO_SD_CARD_CD_P1PIN);
128 }
129 
130 
131 
132 #ifdef __cplusplus
133 }
134 #endif
135 #endif /* BIO_H__ */
#define LPC_PINCON
Definition: LPC17xx.h:1028
#define BIO_NORDIC_IRQ_P0PIN
P0.22.
Definition: bio.h:39
#define LPC_GPIO1
Definition: LPC17xx.h:1006
#define BIO_NORDIC_CE_P1PIN
P1.24.
Definition: bio.h:40
#define BIO_LED_PORT1_MASK
Definition: bio.h:45
CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series.
#define BIO_FLASH_CS_P0PIN
P0.6.
Definition: bio.h:37
#define BIO_SD_CARD_CS_P1PIN
P1.25.
Definition: bio.h:42
#define BIO_SD_CARD_CD_P1PIN
P1.26.
Definition: bio.h:43
#define BIO_SW_PORT1_MASK
Definition: bio.h:46
#define LPC_GPIO0
Definition: LPC17xx.h:1005
#define BIO_NORDIC_CS_P0PIN
P0.16.
Definition: bio.h:38