49 #define _WIN32_WINNT 0x0600 61 #define WIN32_PORT_SAVE_WHEN_STOPPED 1 62 #define WIN32_PORT_EXIT_WHEN_STOPPED 1 66 #define DIRECTION_INCREMENTING 1 67 #define DIRECTION_DECREMENTING 2 97 #define PORT_APPLICATION_DEFINED -2 98 #define PORT_NOT_SET -1 99 #define PORT_HWIndependent 0 101 #define PORT_Atmel_AT91SAM7 2 102 #define PORT_Atmel_UC3A0 3 103 #define PORT_ARM_CortexM 4 104 #define PORT_Renesas_RX600 5 105 #define PORT_Microchip_dsPIC_AND_PIC24 6 106 #define PORT_TEXAS_INSTRUMENTS_TMS570 7 107 #define PORT_TEXAS_INSTRUMENTS_MSP430 8 108 #define PORT_MICROCHIP_PIC32MX 9 109 #define PORT_XILINX_PPC405 10 110 #define PORT_XILINX_PPC440 11 111 #define PORT_XILINX_MICROBLAZE 12 112 #define PORT_NXP_LPC210X 13 113 #define PORT_MICROCHIP_PIC32MZ 14 114 #define PORT_ARM_CORTEX_A9 15 115 #define PORT_ARM_CORTEX_M0 16 179 #if (SELECTED_PORT == PORT_Win32) 181 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 182 #define HWTC_COUNT (ulGetRunTimeCounterValue()) 183 #define HWTC_PERIOD 0 184 #define HWTC_DIVISOR 1 187 #define IRQ_PRIORITY_ORDER 1 189 #elif (SELECTED_PORT == PORT_HWIndependent) 191 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 193 #define HWTC_PERIOD 1 194 #define HWTC_DIVISOR 1 197 #define IRQ_PRIORITY_ORDER NOT_SET 200 #elif (SELECTED_PORT == PORT_ARM_CortexM) 202 void prvTraceInitCortexM(
void);
204 #define REG_DEMCR (*(volatile unsigned int*)0xE000EDFC) 205 #define REG_DWT_CTRL (*(volatile unsigned int*)0xE0001000) 206 #define REG_DWT_CYCCNT (*(volatile unsigned int*)0xE0001004) 207 #define REG_DWT_EXCCNT (*(volatile unsigned int*)0xE000100C) 210 #define DEMCR_TRCENA (1 << 24) 213 #define DWT_CTRL_NOPRFCNT (1 << 24) 216 #define DWT_CTRL_NOCYCCNT (1 << 25) 219 #define DWT_CTRL_EXCEVTENA (1 << 18) 222 #define DWT_CTRL_CYCCNTENA (1) 224 #define PORT_SPECIFIC_INIT() prvTraceInitCortexM() 226 extern uint32_t DWT_CYCLES_ADDED;
228 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 229 #define HWTC_COUNT (REG_DWT_CYCCNT + DWT_CYCLES_ADDED) 230 #define HWTC_PERIOD 0 231 #define HWTC_DIVISOR 4 233 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 235 #elif (SELECTED_PORT == PORT_ARM_CORTEX_M0) 236 #define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING 237 #define HWTC_COUNT (*((uint32_t*)0xE000E018)) 238 #define HWTC_PERIOD ((*(uint32_t*)0xE000E014) + 1) 239 #define HWTC_DIVISOR 48 241 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 243 #elif (SELECTED_PORT == PORT_Renesas_RX600) 245 #include "iodefine.h" 247 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 248 #define HWTC_COUNT (CMT0.CMCNT) 249 #define HWTC_PERIOD (CMT0.CMCOR + 1) 250 #define HWTC_DIVISOR 1 251 #define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant 253 #elif ((SELECTED_PORT == PORT_MICROCHIP_PIC32MX) || (SELECTED_PORT == PORT_MICROCHIP_PIC32MZ)) 255 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 256 #define HWTC_COUNT (TMR1) 257 #define HWTC_PERIOD (PR1 + 1) 258 #define HWTC_DIVISOR 1 259 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 261 #elif (SELECTED_PORT == PORT_Microchip_dsPIC_AND_PIC24) 269 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 270 #define HWTC_COUNT (TMR1) 271 #define HWTC_PERIOD (PR1+1) 272 #define HWTC_DIVISOR 1 273 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 275 #elif (SELECTED_PORT == PORT_Atmel_AT91SAM7) 279 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 280 #define HWTC_COUNT ((uint32_t)(AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)) 281 #define HWTC_PERIOD ((uint32_t)(AT91C_BASE_PITC->PITC_PIMR + 1)) 282 #define HWTC_DIVISOR 1 283 #define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant 285 #elif (SELECTED_PORT == PORT_Atmel_UC3A0) 290 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 291 #define HWTC_COUNT ((uint32_t)sysreg_read(AVR32_COUNT)) 292 #define HWTC_PERIOD ((uint32_t)(sysreg_read(AVR32_COMPARE) + 1)) 293 #define HWTC_DIVISOR 1 294 #define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant 296 #elif (SELECTED_PORT == PORT_NXP_LPC210X) 301 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 302 #define HWTC_COUNT *((uint32_t *)0xE0004008 ) 303 #define HWTC_PERIOD *((uint32_t *)0xE0004018 ) 304 #define HWTC_DIVISOR 1 305 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 307 #elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570) 311 #define TRC_RTIFRC0 *((uint32_t *)0xFFFFFC10) 312 #define TRC_RTICOMP0 *((uint32_t *)0xFFFFFC50) 313 #define TRC_RTIUDCP0 *((uint32_t *)0xFFFFFC54) 314 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 315 #define HWTC_COUNT (TRC_RTIFRC0 - (TRC_RTICOMP0 - TRC_RTIUDCP0)) 316 #define HWTC_PERIOD (RTIUDCP0) 317 #define HWTC_DIVISOR 1 319 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 321 #elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430) 325 #define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING 326 #define HWTC_COUNT (TA0R) 327 #define HWTC_PERIOD (((uint16_t)TACCR0)+1) 328 #define HWTC_DIVISOR 1 329 #define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant 331 #elif (SELECTED_PORT == PORT_XILINX_PPC405) 335 #define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING 336 #define HWTC_COUNT mfspr(0x3db) 337 #if (defined configCPU_CLOCK_HZ && defined configTICK_RATE_HZ) // Check if FreeRTOS 339 #define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) // Same as in port.c for PPC405 342 #error HWTC_PERIOD must be defined to give the number of hardware timer ticks per OS tick. 344 #define HWTC_DIVISOR 1 345 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 347 #elif (SELECTED_PORT == PORT_XILINX_PPC440) 352 #define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING 353 #define HWTC_COUNT mfspr(0x016) 354 #if (defined configCPU_CLOCK_HZ && defined configTICK_RATE_HZ) // Check if FreeRTOS 356 #define HWTC_PERIOD ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) // Same as in port.c for PPC440 359 #error HWTC_PERIOD must be defined to give the number of hardware timer ticks per OS tick. 361 #define HWTC_DIVISOR 1 362 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 364 #elif (SELECTED_PORT == PORT_XILINX_MICROBLAZE) 372 #include "xtmrctr_l.h" 374 #define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING 375 #define HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 ) 376 #define HWTC_PERIOD (XTmrCtr_mGetLoadReg( XPAR_TMRCTR_0_BASEADDR, 0) + 1) 377 #define HWTC_DIVISOR 16 378 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 380 #elif (SELECTED_PORT == PORT_ARM_CORTEX_A9) 384 #define CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK 0x0000FF00 385 #define CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT 8 387 #define CA9_MPCORE_PRIVCTR_PERIOD_REG (*(volatile uint32_t*)(0xF8F00600 + 0)) 388 #define CA9_MPCORE_PRIVCTR_COUNTER_REG (*(volatile uint32_t*)(0xF8F00600 + 4)) 389 #define CA9_MPCORE_PRIVCTR_CONTROL_REG (*(volatile uint32_t*)(0xF8F00600 + 8)) 391 #define CA9_MPCORE_PRIVCTR_PRESCALER (((CA9_MPCORE_PRIVCTR_CONTROL_REG & CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK) >> CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT) + 1) 394 #define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING 395 #define HWTC_COUNT CA9_MPCORE_PRIVCTR_COUNTER_REG 396 #define HWTC_PERIOD ((CA9_MPCORE_PRIVCTR_PERIOD_REG * CA9_MPCORE_PRIVCTR_PRESCALER) + 1) 402 #define HWTC_DIVISOR 1 404 #define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant 406 #elif (SELECTED_PORT == PORT_APPLICATION_DEFINED) 408 #if !( defined (HWTC_COUNT_DIRECTION) && defined (HWTC_COUNT) && defined (HWTC_PERIOD) && defined (HWTC_DIVISOR) && defined (IRQ_PRIORITY_ORDER) ) 409 #error SELECTED_PORT is PORT_APPLICATION_DEFINED but not all of the necessary constants have been defined. 412 #elif (SELECTED_PORT != PORT_NOT_SET) 414 #error "SELECTED_PORT had unsupported value!" 415 #define SELECTED_PORT PORT_NOT_SET 419 #if (SELECTED_PORT != PORT_NOT_SET) 421 #ifndef HWTC_COUNT_DIRECTION 422 #error "HWTC_COUNT_DIRECTION is not set!" 426 #error "HWTC_COUNT is not set!" 430 #error "HWTC_PERIOD is not set!" 434 #error "HWTC_DIVISOR is not set!" 437 #ifndef IRQ_PRIORITY_ORDER 438 #error "IRQ_PRIORITY_ORDER is not set!" 439 #elif (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1) 440 #error "IRQ_PRIORITY_ORDER has bad value!" 443 #if (HWTC_DIVISOR < 1) 444 #error "HWTC_DIVISOR must be a non-zero positive value!" 455 #define vTraceConsoleMessage(x) void vTracePortGetTimeStamp(uint32_t *puiTimestamp)